Nasa announces change to its Moon landing plans

· · 来源:cd资讯

以600mm×600mm面板为例,其面积是12英寸晶圆载板的5.1倍,单片产出芯片数量大幅增加。同时,FOPLP的面积利用率超95%,显著优于传统晶圆级封装的85%,同等面积下面板可多容纳1.64倍芯片。基板面积增大持续降低成本,200mm向300mm过渡节约25%成本,300mm向板级封装过渡更可节约66%成本。

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He added that the extra flight to low-Earth orbit would help to test the technology before a Moon landing.,这一点在同城约会中也有详细论述

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